Phase-locked loop (PLL) devices are control systems that generate signals having a fixed relationship to the phase of a reference signal. Typically, a phase-locked loop device generates a desired signal in response to both the frequency and the phase of the reference signal as well as a control signal. Often this includes raising or lowering the frequency of a frequency generator, such as a digitally controlled oscillator (DCO), or the like, until a true or modified form (a fraction, for example) of the oscillator output signal is matched with the reference signal in both frequency and phase. Phase-locked loops are widely used in radio, telecommunications, computers, and other electronic applications.
Controlled oscillators may experience jitter, or variations in the timing of the rising and/or falling edges of the periodic signal. Accumulated jitter can cause in-band phase noise, and like negative effects. Oscillators controlled via a PLL may experience jitter when operating the PLL in a fractional mode. For example, the PLL may use a fractional feedback divider, allowing the generation of output frequencies that are fractional multiples of the reference frequency. Over-threshold jitter or phase noise can make some PLLs operating in fractional mode less desirable for higher-accuracy uses, such as with wireless applications, for example.